The B-ISDN (Broad band-Integrated Service Digital Network) is a network capable of dealing with the transfer of various types of information contemplated in the future, such as full motion pictures, high-definite images or large capacity files, it has been vigorously researched and developed worldwide. For such a B-ISDN, ATM is currently recognized to be more suitable than the conventional STM (Synchronous Transfer Mode).
ATM is an information transfer mode where information to be transmitted is loaded into fixed length cells, each cell comprising a header and an information field which are multiplexed together for transfer over transmission lines. These fixed length cells are hereinafter referred to as ATM cells. ATM allows the network system to obtain an effective use of the transmission lines, as well as a flexibility such that information transfer can be made regardless of information type (sound and image).
In order to achieve integrated service by the ATM network, however, it is necessary to connect the ATM network to the existing communication network and, to such an end, a system for cell assembly/disassembly becomes indispensable. Since cell assembly/disassembly is made for each call, a high speed and large multiplexing capability is necessary to the system for cell assembly/disassembly.
A conventional system is hereinafter described, taking the cell assembly/disassembly, by way of example, which is performed between fixed bit rate data on an N-channel time division multiplex (TDM) data highway and ATM cells on the ATM highway.
It should be noted that the term "virtual channel" or "VC" is hereinafter defined by VPI (Virtual Path Identifier) and VCI (Virtual Channel Identifier).
First, a cell assembly apparatus, which assembles ATM cells from the TDM data, is provided with N buffer memories and N memory controllers corresponding to the N channels, respectively. Upon receipt of the TDM data, it is allocated to the respective buffer memories according to their channels where the respective cells are individually assembled. On completion of the assembly of a cell, the cell is read out from the buffer memory and is transmitted to the ATM highway as an ATM cell.
A cell disassembly apparatus, which disassembles ATM cells into the TDM data, is provided with N FIFO (First-In First-Out) buffer memories and N memory controllers corresponding to the N virtual channels, respectively. The received ATM cells are stored into the respective buffer memories in the received order. Subsequently, a virtual channel is specified based on frame and clock pulses of the TDM data highway, and the data of an ATM cell is read out from the buffer memory corresponding to the specified virtual channel to be emitted to the data highway as the TDM data.
However, in the conventional cell assembly/disassembly, it has been necessary to prepare respective buffer memories having capacities matching with the data speeds on the TDM data highway. As a result, if one intends to deal with a plurality of fixed bit rate data each differing in speed, it has been necessary to provide all the buffer memories with the capacity corresponding to the maximum data speed, or specify the channel to be used for each bit rate. Further, in assembly of an ATM cell, since on completion of assembly the cell is read out from the buffer memory, there are some cases where several cells are read out simultaneously. Therefore, it has been necessary to prepare at least one extra buffer memory for standby purpose.
In a cell assembly, assuming that the TDM data highway, as input, is comprised of 127 channels for 64 Kbit/s fixed bit rate data and one channel for 52 Mbit/s fixed bit rate data, and that the ATM highway as output is comprised of 128 channels, transmission a rate of 156 Mbit/s, and a cell length of 424 bits (=53 bytes.times.8 bits), the time required to emit the ATM cell will amount to about 347.9 .mu.sec (=128.times.424 bit/156 Mbit/s). The data amount flowing in from the data highway within this period of time will result in about 22.3 bits (=347.9 .mu.sec.times.64 Kbit/s) for 64 Kbit/s and 18090.8 bits (=47.9 .mu.sec.times.52 Mbit/s) for 52 Mbit/s.
If the respective capacities of all buffer memories are set to the capacity corresponding to the maximum fixed bit rate, then the whole capacity of the buffer memories for cell assembly becomes about 54.3 Kbit (=128.times.424 bits) and the capacity of the standby buffer memory becomes about 2.3 Mbits (=128.times.18090.8 bits) and, hence, the necessary amount of memory is about 2.4 Mbit.
On the other hand, according to the arrangement in which the channel is used restrictively for each bit rate, the whole capacity of the cell assembly buffer memories becomes about 54.3 Kbit (=128 .times.424 bit) and the capacity of the standby buffer memory becomes about 20.9 Kbit (=127.times.22.3 bits+18090.8 bits). Hence, the necessary amount of memory can be reduced to about 75.2 Kbit. However, the arrangement of the fixed bit rates on the TDM data highway cannot be changed. For instance, if the TDM data highway as an input is comprised of 8 channels including the fixed bit rate data of 1.5 Mbits/s, then the time required to stand by will amount to about 21.7 .mu.sec (=8.times.424 bits/156 Mbit/s). Data flowing in within this period of time equals about 32.6 bits (=21.7 .mu.sec.times.1.5 Mbit/s). Therefore, the standby buffer memory of 64 Kbit/s cannot be used and the fixed bit rates cannot be changed.
In cell disassembly, assuming that the additional delay is set to 6 msec and the TDM data highway as output is comprised of 32 channels for 64 Kbit/s of fixed bit rate data and 2 channels for 1.5 Mbit/s of fixed bit rate data. In this case, the memory capacity required for one channel of 64 Kbit/s equals 384 bits (=64 Kbit/s .times.6 msec) and the memory capacity required for one channel of 1.5 Mbit/s equals 9216 bits (=1.5 Mbit/s.times.6 msec). Therefore, if any arbitrary time slot of the TDM can be used, the memory amount required will entirely equal 313 Kbits (=(32+2).times.9216 bits).
On the other hand, if the virtual channel used for each fixed bit rate is specified, then the necessary amount of memory will equal 32 Kbits (=32.times.384 bits+2.times.9216 bits), which means that the required amount of memory can be reduced as in the cell assembly. However, this arrangement cannot deal with, for example, 3 channels of 1.5 Mbit/s although this TDM data requires a smaller amount of memory, 28 Kbits, and are lower in entire bit rate. Each buffer memory is used restrictively for the corresponding virtual channel.
It is an object of the present invention to provide a cell assembly/disassembly system where the necessary amount of buffer memory can be reduced and the arrangement of bit rates on the TDM data highway can be arbitrary decided.